Superconducting Qubits
IBM, in collaboration with the University of Chicago, Qedma, and Algorithmiq, demonstrated three types of verifiable quantum results on a Heron processor: an encoded circuit reaching 70 logical qubits, a 74-qubit Floquet dynamics simulation (with QESEM error mitigation), and a heterogeneous material simulation; classical methods gave divergent or uncertain results at these scales[4]. This progress surpasses the capability boundary of classical simulation at the logical-qubit level for the first time. Although the logical qubits used may be at the error-detection level rather than full error-correction level, it approaches a new height in practical verification for the superconducting route — compared to Google Willow’s earlier 105-physical-qubit surface-code demonstration (Λ≈2.1), IBM significantly leads in logical-qubit count this time; however, key metrics such as whether the logical error rate is lower than the physical error rate and the post-selection rate still need confirmation[4].
Quantum Interconnects and Infrastructure
QTREX’s additively manufactured coaxial quantum-interconnect platform achieved continuous broadband transmission from 10 MHz to 20 GHz, with isolation of at least 68 dB and an average channel-to-channel skew of only 4.4 picoseconds, demonstrating high manufacturing consistency[5]. This performance surpasses the RF benchmarks set by partners, providing a key enabling technology for high-density, low-noise interconnects between quantum processors and classical control electronics. Especially in the scaling of superconducting and silicon-spin qubits, low-skew interconnects are a necessary condition for maintaining synchronisation in large-scale systems[5].